1. Field of the Invention
The present invention relates to a signal transfer circuit. Particularly, the present invention relates to a signal transfer circuit of a solid-state image pickup device including an analog-to-digital (AD) converting circuit for each column.
2. Description of the Related Art
In recent years, solid-state image pickup devices have been used in various devices such as still cameras, video cameras, medical endoscopic cameras, industrial endoscopic cameras, high-performance visual sensors for robots, and perimeter monitoring visual sensors for vehicles. Charged coupled device (CCD) image sensors and complementary metal-oxide semiconductor (CMOS) image sensors have been known as solid-state image pickup devices used in these devices.
A CMOS image sensor can be manufactured by the same technique as a general semiconductor manufacturing process, and thus the CMOS image sensor can have various functions due to various functional circuits embedded in a sensor. For example, as an image sensor in which a functional circuit is embedded in a sensor, Japanese Unexamined Patent Application, First Publication No. 2007-124400 discloses a technique related to an image sensor in which an AD converting circuit is provided for each column of a pixel array arranged in the form of a matrix, and a digital signal which has been subjected to AD conversion is output in units of rows.
For example, the image sensor in which an AD converting circuit is provided for each column may be provided with a circuit (hereinafter referred to as a “signal transfer circuit”) for the purpose of performing a calculation process using signal information of a plurality of rows in the image sensor and performing an AD conversion operation and an external output operation in parallel temporally. For example, a signal transfer circuit for such a purpose may usually include a memory circuit, which holds a digital signal (signal information) of one or more rows of the image sensor, the memory circuit being disposed between a latch circuit that temporarily latches a digital signal output from the AD converting circuit and horizontal signal output lines for sequentially outputting the digital signal to the outside of the image sensor.
FIG. 12 is a circuit connection diagram illustrating an example of a connection of components related to transfer of a digital signal in an image sensor in accordance with the related art. The signal transfer circuit illustrated in FIG. 12 temporarily holds digital signals output from a digital signal generating circuit, which outputs a digital signal, such as an AD converting circuit arranged for each column, and then transfers the digital signals to the memory circuit. FIG. 12 illustrates components related to transfer of a digital signal (signal information) corresponding to one column of the image sensor.
An AD converting circuit 111 converts analog signals output from pixels (not shown) into an n-bit digital signal, and outputs respective bit signals to a latch circuit 211 through different lines. In the following description, a number in “( ): parentheses” following a symbol represents a bit of a digital signal. For example, a second bit of a digital signal is represented by “(2).”
The latch circuit 211 holds respective bits of the n-bit digital signal output from the AD converting circuit 111 in internal latches bit(1) to bit(n). Then, the latch circuit 211 outputs the held digital signal to a signal transfer line 411 through switches SWL(1) to SWL(n). The latch circuit 211 is for the purpose of reducing an output load when the digital signal is output from the AD converting circuit 111, and thus is arranged to be near the AD converting circuit 111 or built into the AD converting circuit 111.
A memory circuit 311 receives the digital signal output to the signal transfer line 411 through switches SWM(1) to SWM(n) and holds the digital signal in internal memories bit(1) to bit(n). Thereafter, the memory circuit 311 outputs the held digital signal to the outside according to control of a driving control circuit (not shown).
Here, transfer control of the digital signal (signal information) in the signal transfer circuit will be described. FIG. 13 is a timing chart illustrating a driving timing to transfer the digital signal in the signal transfer circuit of the image sensor in accordance with the related art. The timing chart illustrated in FIG. 13 illustrates a driving timing when the signal information held in the latch circuit 211 of the signal transfer circuit illustrated in FIG. 12 is sequentially transferred to the memory circuit 311.
Here, when the signal information held in the latch circuit 211 is transferred to the memory circuit 311, in a data transfer operation time period, the switch SWL(1) and the switch SWM(1) are first turned on, and thus the latch bit(1) of the latch circuit 211 is connected with the memory bit(1) of the memory circuit 311 through the signal transfer line 411. As a result, the signal information held in the latch bit(1) is transferred to the memory bit(1). Similarly, the switches SWL(2) to SWL(n) and the switches SWM(2) to SWM(n) are sequentially turned on, and thus the signal information held in each latch of the latch circuit 211 is sequentially transferred to each memory of the memory circuit 311.
In the signal transfer circuit that transfers the digital signal (signal information) from the latch circuit 211 to the memory circuit 311, all latches (the latches bit(1) to bit(n)) in the latch circuit 211 and all memories (the memories bit(1) to bit(n)) in the memory circuit 311, which are arranged in a column direction, are connected to the signal transfer line 411, and thus a line length of the signal transfer line 411 is long, and parasitic resistance is large. In addition, the switches SWL(1) to SWL(n) and the switches SWM(1) to SWM(n) which are connected to the signal transfer line 411 serve as parasitic capacitance.
Here, when loads such as parasitic resistance and parasitic capacitance become the cause of deteriorating the transferred digital signal and destroying the digital signal (signal information) when the digital signal is transferred at a high speed.